The ongoing development of electronics involves improving performance and adding functionality to existing products. These ends are pursued by advancing integrated circuit (IC) technologies. IC technologies typically progress such that newer manufacturing processes enable chips that use lower voltages and less power, while increasing transistor density and switching speeds. This has led to a number of manufacturing processes that are used to produce chips that use different voltage supply levels.
Voltage logic levels—typically the voltage levels that represent the binary values “1” and “0”—on a chip are generally set relative to a voltage supply level. For example, the binary value “1” is typically represented by a voltage supply level provided to a chip (VDD); and, the binary value “0” is typically represented by electrical ground (or 0 Volts). Consequently, the voltage logic levels on a chip fabricated by one process may be different from those on another chip fabricated by another process, which creates integration problems for downstream users and manufacturers.
A chip targeting open platforms and markets often includes functionality that permits the chip to receive logic signals from another chip having different voltage logic levels. The functionality is termed “level shifting,” and various designs have been previously employed, each having limitations and drawbacks. In particular, receiving logic signals produced by a chip that uses a lower voltage supply level often results in increased power dissipation and deterioration of the previously available level shift circuitry, in addition to data errors caused by inaccurate level shifting.